1 AM50N03-12I analog power november, 2003 - rev. a preliminary publication order number: ds-AM50N03-12I_a these miniature surface mount mosfets utilize high cell density process. low r ds(on) assures minimal power loss and conserves energy, making this device ideal for use in power management circuitry. typical applications are pwmdc-dc converters, power management in portable and battery-powered products such as computers, printers, battery charger, telecommunication power system, and telephones power system. v ds (v) r ds(on) m( ? )i d (a) 13 @ v gs = 10v 51 20 @ v gs = 4.5v 41 product summary 30 n-channel 30-v (d-s) mosfet ?low r ds(on) provides higher efficiency and extends battery life ? miniature to-252 surface mount package saves board space ? high power and current handling capability ? low side high current dc-dc converter applications notes a. surface mounted on 1? x 1? fr4 board. b. pulse width limited by maximum junction temperature symbol limit units v ds 30 v gs 20 continuous drain current a t c =25 o c i d 51 i dm 40 i s 30 a power dissipation a t c =25 o c p d 50 w t j , t stg -55 to 175 o c operating junction and storage temperature range continuous source current (diode conduction) a absolute maximum ratings (t a = 25 o c unless otherwise noted) parame te r pulsed drain current b v gate-source voltage drain-source voltage a parameter symbol maximum units maximum junction-to-ambient a r ja 50 o c/w maximum junction-to-case r jc 3.0 o c/w thermal resistance ratings
2 AM50N03-12I analog power november, 2003 - rev. a preliminary publication order number: ds-AM50N03-12I_a notes a. pulse test: pw <= 3 00us duty cycle <= 2%. b. guaranteed by design, not subject to production testing. analog power (apl) reserves the right to make changes without further notic e to any products herein. apl makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does apl assume any liability arising ou t of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, conseque ntial or incidental damages. ?typical? parameters which may be provided in apl data sheet s and/or specifications can a nd do vary in different appli cations and actual performance may vary over time. all operating parameters , including ?typicals? must be validated for each customer appl ication by customer?s technical experts. apl does not convey any license under its patent rights nor the rights of others. apl products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications int ended to support or sustain life, or for any other application in which the failure of the apl product could create a situation where personal inju ry or death may occur. should buyer purchase or use apl products for any such uninte nded or unauthorized application, buyer shall indemnify and hold a pl and its officers, employees, subsidiari es, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirect ly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that apl was negligent regarding the design or m anufacture of the part. apl is an equal opportunity/affirmative action employer. min typ max ga t e -t h re s h o ld vo lt a g e v gs(th) v ds = v gs , i d = 250 ua 1.0 v gate-body leakage i gss v ds = 0 v, v gs = 20 v 100 na v ds = 24 v, v gs = 0 v 1 v ds = 24 v, v gs = 0 v, t j = 55 o c 25 on-state drain current a i d(on) v ds = 5 v, v gs = 10 v 34 a v gs = 10 v, i d = 51 a 13 v gs = 4.5 v, i d = 41 a 20 forward tranconductance a g fs v ds = 15 v, i d = 51 a 22 s diode forward voltage v sd i s = 34 a, v gs = 0 v 1.1 v total gate charge q g 4.0 gate-source charge q gs 1.1 ga t e -dra in ch a rg e q gd 1.4 turn-on delay time t d(on) 16 ris e time t r 5 turn-off delay time t d(off) 23 fall-time t f 3 source-ddrain reverse recovery time t rr i f = 34 a, di/dt = 100 a/us 50 drain-source on-resistance a r ds(on) m ? parame te r limits unit v dd = 25 v, r l = 25 ? , i d = 34 a, v gen = 10 v ns v ds = 15 v, v gs = 4.5 v, i d = 51 a nc dynamic b specifications (t a = 25 o c unless otherwise noted) ua i dss zero gate voltage drain current static te st conditions symbol
3 AM50N03-12I analog power november, 2003 - rev. a preliminary publication order number: ds-AM50N03-12I_a package information
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